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Q2 2009    
Editor's Words

The blog is hosted by industry expert and respected journalist and resides at www.cadence.com/community/blogs/ii.
Read Details»       Visit the Blog»

Cadence has teamed with Xuropa to provide a personalized tool evaluation experience. This hands-on approach lets you explore tools from your own desktop and provide feedback to Cadence and other users.

The Incisive Verification IP product line is taking the initiative. The MIPI Camera Serial Interface and MIPI Display Serial Interface product demonstrations are now available on-line at the Cadence Labs at Xuropa.com.

These are not canned demos. You drive actual simulation runs on a sample design. This is the next wave in EDA product evaluation. We want to hear what you think of it!

Select MIPI-CSI or MIPI-DSI to run the demos.

In the News
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  • Cadence Unveils Integrated Chip Planning and Implementation Solution to
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  • Cadence Introduces Innovative FPGA-PCB Co-Design Solution»
  • Cadence and Virtutech Extend Metric-Driven Verification to Virtual Systems

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    Electronics Giant Finds Great Productivity, Predictability and IP Reuse Benefits by Combining C-to-Silicon Compiler with Cadence RTL Compiler and Incisive Enterprise Simulator
  • NXP Semiconductors Accelerates Design Cycle using New Cadence Encounter Digital Implementation System for Industry’s First 45nm Digital TV Processor»
    Encounter’s Integrated Advanced Node Design-for-Manufacturing Capabilities Boosts Designer Productivity and Time-to-Market
  • Hot Topic
  • Encounter Digital Implementation System delivers a complete solution for variation- and manufacturing-aware design closure, low power, mixed-signal implementation, and integrated signoff in a single, scalable multi-CPU-enabled design environment for high-capacity, high-performance digital implementation.
      Read the Datasheet»