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Verification
In the verification area, we build formal verification engines to improve the performance of assertion-based verification as an engineering tool. We are also building automated techniques for hardware/software co-verification that are scalable and effective.
Model checking and SAT technology from Cadence Research Laboratories is built into Cadence's Incisive functional verification platform (including the Incisive Formal Verifier) and Cadence's Encounter digital IC design platform.
Projects
 | Formal verification engines | | SAT technology | | Compositional verification | | Hardware/Software Co-Verification |
People
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