Cadence Kits
Incisive functional verification
Encounter digital IC design
Virtuoso custom design
Allegro IC-PKG-PCB co-design
OrCAD PCB design
System-in-package design
Design for manufacturing
PRODUCTS
Assura DRC
Assura LVS
Cadence CMP Predictor
Cadence Litho Electrical Analyzer
Cadence Litho Physical Analyzer
Cadence MaskCompose Suite
Cadence QuickView Viewer
Cadence QRC Extraction
Diva Physical Verification
Dracula
Encounter Test
Physical Verification System
DESIGN TASKS
Silicon analysis
Analysis and signoff
IP catalog
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Design for manufacturing success stories


Archived Success Stories



Gain Technology
Baseline TSMC PDK helped fabless IC designer meet deadline for entering huge market

Honeywell
Cadence Services Develop PDK for the Honeywell SOI4 Process on Schedule, on Budget, and to the Satisfaction of the DOD

Metalink
CeltIC Crosstalk Analyzer detected elusive signal integrity problems prior to tapeout

Microtune
Analog Design Environment, Virtuoso Schematic Composer, Diva Physical Verification, and Spectre RF helped in design of world's first single-chip television tune