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Home > Products > Design for manufacturing > Products > Cadence Litho Electrical Analyzer
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Cadence Litho Electrical Analyzer
Cadence® Litho Electrical Analyzer is the industry's first
complete and silicon-correlated electrical DFM analysis product
to help designers using sub-90nm processes optimize and control
the impact of lithography, mask, etch, RET, OPC, and CMP effects
on their chip parameters.
Cadence Litho Electrical Analyzer uses fab-certified technology
to predict contours across the process window and to predict device
and interconnect silicon electrical behavior. Its silicon
contour-based analysis technology provides an accurate model-based
solution to identify parametric issues associated with manufacturing
variability. Therefore, designers can analyze and minimize the
effects of variations on their design performance in their existing
design flows.
Benefits
 | Extracts device and interconnect electrical behavior from contours | | Detects and repairs timing and leakage hotspots due to systematic variations | | Reduces design margins and accelerates timing closure | | Improves parametric yield and chip performance | | Transparently integrates with library, custom, and full-chip design flows |
For more information on this product send an email to soheil@cadence.com.
Visit the Cadence Designer Network User Community for user contributed
technical articles, product reviews, and interactive forums. Visit
www.cdnusers.org.
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