Designing with embedded processors, such as the ARM® Cortex™-A8 processor, for low-power mobile and consumer applications presents a number of challenges including shrinking geometries and power efficiency. It also requires large numbers of designers and months of design time.
The Cadence® Encounter® Express Flow for the Cortex-A8 Processor provides an automated, synthesizable RTL to GDS solution that addresses these issues. Included in the flow are the SoC Encounter automatic floorplanner, global physical synthesis (GPS), NanoRoute® Ultra router, verification and chip-finishing technology. CeltIC® Nanometer Delay Calculator (NDC) and VoltageStorm® static analysis are also available to provide signoff-quality SI- and IR-aware timing. Customer benefits include faster time to market and confidence in achieving performance/power targets with maximum productivity and efficiency.
