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Encounter Conformal Technologies


 To shorten overall design-cycle times and minimize silicon re-spins, designers need production-proven validation. Encounter® Conformal® verification technologies, part of the Cadence® Encounter digital IC design platform and a component of the Cadence Logic Design Team Solution, offer the most comprehensive solutions for equivalence checking, design-constraint management, and low-power design verification.
 Products


 Encounter Conformal Equivalence Checker
Encounter Conformal Equivalence Checker can handle complex datapath, digital custom logic, custom memories, and FPGA designs—from RTL to layout. It also performs functional checks to verify clock synchronization. Encounter Conformal Equivalence Checker is available in L, XL, and GXL offerings.
Encounter Conformal Constraint Designer
Encounter Conformal Constraint Designer automates the generation, validation, and refinement of constraints to ensure that timing constraints are valid throughout the entire design process, helping designers achieve rapid timing closure. Encounter Conformal Constraint Designer is available in L and XL offerings.
Encounter Conformal Low Power
Encounter Conformal Low Power, a key technology in the Encounter low-power design flow, helps designers verify and debug power-optimized multimillion-gate designs. It combines low-power structural and functional checks with world-class equivalence checking to provide superior performance, capacity, and ease of use. Encounter Conformal Low Power is available in XL and GXL offerings.

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