Encounter Conformal Equivalence Checker


	PRODUCTS


		SoC Encounter


		First Encounter


		Encounter RTL Compiler


		Encounter Test


		Encounter Conformal ECO Designer


		Encounter Conformal Equivalence Checker


		Encounter Conformal Constraint Designer


		Encounter Conformal Low Power


		Encounter Timing System


		Encounter Library Characterizer


		CeltIC NDC


		NanoRoute


		VoltageStorm


		Cadence QRC Extraction


		Cadence Chip Optimizer


		Cadence SiP Digital Architect


		Cadence SiP Digital Layout


		Cadence SiP Digital SI


	DESIGN TASKS


		High-performance timing closure


		Implementation of large-scale designs


		Analysis and signoff


		Design for Manufacturing


		Mixed-signal design


		Applications Using the ARM Cortex-A8 Processor

Encounter Conformal Equivalence Checker

To shorten overall design-cycle times and minimize silicon re-spins, designers need production-proven validation. Encounter® Conformal® verification technologies, part of the Cadence® Encounter digital IC design platform and a component of the Cadence Logic Design Team Solution, offer the most comprehensive solutions for equivalence checking, design-constraint management, functional ECO, and low-power design verification.

Encounter Conformal Equivalence Checker can handle complex datapath, digital custom logic, custom memories, and FPGA designs—from RTL to layout. It also performs functional checks to verify clock synchronization. Encounter Conformal Equivalence Checker is available in L, XL, and GXL offerings.

Visit the Cadence Designer Network User Community for user contributed technical articles, product reviews, and interactive forums. Visit www.cdnusers.org.

Read Encounter customer success stories and find out how others are succeeding with Encounter technology.

Encounter Conformal Flow








	Encounter RTL Compiler wins EE Times Synthesis Poll Encounter RTL Compiler was the clear favorite EDA synthesis tool in a recent poll of EE Times Europe readers. Analysis and signoff The most comprehensive and accurate analysis and signoff solution bringing together logical, physical, electrical, and manufacturing domain requirements in a single, easy-to-use environment.



	Datasheets Platform brochure (PDF) Demos and webinars Technical info Success stories Release info News and events User community TSMC Libraries



	Engineering services SourceLink Education Downloads

Cadence Design Systems, Inc.