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Home > Products > Encounter digital IC design > Products > Encounter Conformal Low Power
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Encounter Conformal Low Power



To shorten overall design-cycle times and minimize silicon re-spins,
designers need production-proven validation. Encounter® Conformal®
verification technologies, part of the Cadence® Encounter digital
IC design platform and a component of the Cadence Logic Design Team
Solution, offer the most comprehensive solutions for equivalence
checking, design-constraint management, functional ECO, and low-power
design verification.

Encounter Conformal Low Power, a key technology in the Encounter
low-power design flow, helps designers verify and debug power-optimized
multimillion-gate designs. It combines low-power structural and functional
checks with world-class equivalence checking to provide superior
performance, capacity, and ease of use. Encounter Conformal Low Power
is available in XL and GXL offerings.

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