|
|
 |
 |
 |
 |
 |
 |
 |
 |
Home > Products > Encounter digital IC design > Products > Encounter RTL Compiler
 |
 |
|
Encounter RTL Compiler Synthesis



To maximize performance, decrease die size, reduce power consumption, and boost productivity, designers need a global synthesis solution that enables concurrent optimization of timing, area, and power.

Encounter® RTL Compiler, a key technology in the Cadence® Encounter digital IC design platform and a component of the Cadence Logic Design Team Solution, delivers production-proven global synthesis for faster, smaller, and low-power chips in less time. With its unique set of patented global-focus algorithms, combined with new physically-aware optimization and analysis, Encounter RTL Compiler cuts design time while ensuring the highest quality of silicon.

Read about a number of key adoptions and customer successes that have established Encounter RTL Compiler as the industry leader in global synthesis technology.

Visit the Cadence Designer Network User Community for user contributed technical articles, product reviews, and interactive forums. Visit www.cdnusers.org.

Read Encounter customer success stories and find out how others are succeeding with Encounter technology.


|
 |
 |
 |
|
|