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Home > Products > Encounter digital IC design > Products > VoltageStorm
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VoltageStorm Power and Power Rail Verification
Designers are looking to decrease the risk of voltage (IR) drop-related failures and power-rail electromigration failures as early in the design process as possible. To eliminate costly changes downstream, production-proven power-grid verification is essential.
VoltageStorm® power and power rail verification, a key technology in the Cadence® Encounter® digital IC design platform, automates the analysis and optimization of de-coupling capacitance size and location, and it reduces dynamic IR drop on your most complex, low-power designs.
Integrated with SoC Encounter™ system, VoltageStorm technology helps you manage IR drop from initial power planning through power sign off. By using it to verify your power grid before signal routing, you can eliminate over-design, open additional space for signal routing, and achieve timing closure more efficiently. VoltageStorm PowerMeter technology provides accurate power consumption data (static and dynamic power calculation, including state-dependent leakage), which is an increasing concern for nanometer-scale designs.
VoltageStorm technology also offers a transistor-level power analysis solution, ideal for analysis of custom instances, and a unique analog solution, Virtuoso—Analog VoltageStorm Option, to address the power integrity and electromigration in analog designs.
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| VoltageStorm family enables power integrity verification of large SoC designs |
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