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Home > Products > System-in-package design > Products
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System-in-package design products
|  | Cadence® RF SiP Methodology Kit
Enables fast and streamlined adoption of RF SiP design techniques with low risk | | | Cadence SiP RF Architect
Provides an integration and flow environment between the Virtuoso Analog Design Environment and the SiP RF Layout solution | | | Cadence SiP RF Layout
Enables layout designers to implement a SiP RF design that includes RF/analog die, embedded RF discretes, constraint-driven interconnect, and full SiP tapeout manufacturing preparation | | | Cadence SiP Digital Architect
Provides a unique environment to explore, define, and optimize system connectivity and functionality between ICs, SiP substrates, and target printed circuit board (PCB) systems | | | Cadence SiP Digital Layout
Comprises a complete constraint- and rules-driven package substrate layout environment that supports all packaging methods, including PGA, BGA, MICRO-BGA, chip scale, as well as flip-chip and wirebond attach methods | | | Cadence SiP Digital SI
Fully integrates digital signal integrity analysis, interconnect extraction, and modeling with the physical SiP design environment |
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