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Home > Products > Allegro IC-PKG-PCB co-design > Products > Allegro Package SI
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Allegro Package SI
Integrated environment for design and analysis of high-density IC packages
Cadence® views IC packaging as the critical link in the silicon-to-package-to-board design flow. Without this link, it's easy to design silicon that is difficult or expensive to implement into a system. Allegro® Package SI takes complex IC package virtual prototyping and interconnect exploration, analysis, and modeling to the next level.
Allegro Package SI is a tightly integrated SI solution for advanced IC packages that combines a design environment and simulation technology with a proven 3D field solver engine. It reads and writes package designs produced and designed by Allegro Package Designer L and XL as well as PCB designs created by Allegro PCB Layout. This product allows engineers to make trade-offs among electrical and physical design requirements to meet cost and performance targets.
Key benefits
 | Integrated design and analysis environment easily and accurately makes physical, electrical performance, and cost trade-offs | | Direct integration with a proven 3D field solver engine which eliminates the need for time consuming design set-up | | Reads and writes Allegro Package Designer databases, ensuring that design intent/elements are not lost in translations | | Includes a graphical interconnect topology editor and simulation module with proven solution space exploration for Virtual System Interconnect models (VSIC), develops rules earlier in the design cycle to drive package and PCB design | | Provides interconnect analysis from die to die to connect IC packages to the PCBs they are intended to drive extremely useful for ICs that target existing PCBs/backplanes |
Visit the Cadence Designer Network User Community for user contributed technical articles, product reviews, and interactive forums. Visit www.cdnusers.org.
| An integrated technology platform supports the VSIC model, IP availability, and silicon design-in technology |
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