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Allegro PCB Editor
High-speed PCB layout, routing, and manufacturing output
Cadence® Allegro® PCB Editor is the world's leading PCB layout system. It is the industry's first true physical and electrical Allegro Constraint Manager PCB layout tool. It forms the core of the Cadence® Allegro PCB Design XL series and Allegro PCB Design L series suites, which provide fully interactive environments for creating and editing complex and/or high-speed, multi-layer printed circuit boards. Allegro PCB Editor addresses varied performance criteria, as well as a wide range of design, testability, and manufacturability concerns. Its flexibility, design capacity, and depth of technology features further combine to make Allegro PCB Editor the tool of choice for PCB design professionals.
Allegro PCB Editor is available as part of the Allegro PCB Design L and XL series offering.
Key benefits
|  | High-speed, Constraint-Driven PCB layout
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Allegro PCB Editor employs an interactive, constraint-driven environment for creating and editing complex, multi-layer, high-speed PCBs | | |
Provides a real-time, interactive etch editing environment that is linked to on-line DRC with push-n-shove capability during routing and editing | | |
Dynamic shapes offer the user real-time shape editing-i.e., changes made within the shape trigger an immediate shape updating routine, otherwise known as auto-voiding and healing | | | Allegro PCB Router Integration
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Integrates layout and routing tasks by allowing you to run Allegro PCB Router commands from within Allegro PCB Editor (simply by specifying desired router setup and controls in a dialogue box) | | | Differential Pair Support
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Interactive routing allows users to route the two nets of a differential pair simultaneously, while adhering to differential pair constraints | | | Concurrent Design Methodology
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PCB design partitioning technology provides a concurrent design methodology for faster time to market and reduction in layout time
| | | Design-for-Assembly Analysis
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Offers real-time package-to-package clearance checking during interactive component placement
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Visit the Cadence Designer Network User Community for user contributed technical articles, product reviews, and interactive forums. Visit www.cdnusers.org.
| An integrated technology platform supports the VSIC model, IP availability, and silicon design-in technology |
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View the product scalability diagram
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