Cadence Design Systems, Inc.

Technical Info

This page contains technical information related to Allegro IC-PKG-PCB co-design, including application notes, white papers, and articles. Here are the latest product promotions.

Fact Sheets

	Differential Signals Fact Sheet
	Allegro PCB Editor 15.X High-Speed Design Productivity

Technical papers

	Global Route Environment Technology for Allegro PCB Design GXL Tech Brief
	Design Partitioning Methodology Facilitates Simultaneous, Collaborative PCB Design
	A New Paradigm in Logical Design Creation (Allegro Design Editor)
	Digital High-Speed Packaging Design and Verification—Utilizing a Flow-Based Approach to Counter Digital Package Design Challenges
	Best Practices for High-Speed Digital PCB Design—Technologies Move at Multi-Gigabit Speed

A complete list of technical papers is available on the allegrosi.com user community site. Allegro technical papers

White papers

	Using intelligent automation in advanced PCB design

	Optimizing the PCB Design Chain and the Role of Library and Design-data Management

	A New Paradigm in Logical Design Creation (Allegro Design Editor)

	On Target, On Time—A Co-Design Methodology for System Interconnect

	Return on Investment—A Co-Design Methodology for System Interconnect

Articles

10/18/07	Ensuring Reliable and Optimal Analog PCB Designs With Advanced Analysis for Spice Simulation

07/31/07	Software Options Captures RF Design Intent

07/10/07	Editor's Choice: Cadence's Allegro System Interconnect Design Platform

03/08/07	Solving PCB Design Interconnect Challenges

02/22/07	Methodology and Flow Challenges in Multi-die Package Design

more articles

Cadence feature stories

02/17/06	The IC Package—Missing Link Between Nanometer Silicon and Multi-gigabit PCB Systems

07/02/04	PCI Express Vertical Solution: Best-in-class products address every stage of development

06/23/04	Advanced solutions for multi-GigaHertz signal design

06/16/04	Allegro Design Workbench

06/07/04	TSMC Reference Flow 5.0 Strengthens Design Chain Collaboration Between Cadence and TSMC