Cadence SIP Digital SI
To take full advantage of system-in-package design (SiP), systems engineers require a new set of solutions that address the specific challenges of integrating embedded ICs with the target system interconnect.
Cadence® SiP Digital SI fully integrates digital signal integrity (SI) analysis, interconnect extraction, and modeling with the physical SiP design environment. By combining proven signal integrity technology in an environment that permits interactive editing of die-to-die and substrate interconnect, SiP design engineers can optimize a design to meet both electrical and physical requirements—while achieving reduced design cycle times.
Cadence SiP Digital SI is available in XL (PDF) offering.
Key benefits
Provides a highly integrated physical and electrical design environment
Includes a SPICE-based simulation engine and embedded integration with an industry-proven 3rd party 3D field solver
Enables rapid evaluation of cost-versus-performance tradeoffs through its virtual prototyping environment
